EDN

Xilinx Spartan-6 FPGA User Guide Lite

What is the purpose of this paper? This paper gives potential users an easy-to-grasp idea of the device functions of Xilinx Spartan-6 FPGAs. It describes the functionality of these devices in far more ...
EDN

Advancing FPGA design flows using Chronology’s TimingDesigner

When combined with advances in FPGA technologies that ease complex interface design efforts, Chronology's TimingDesigner can simplify design issues and provide advanced accurate control of high-speed ...
Embedded

FPGA Clock Schemes

One of the most important steps in the design process is to identify how many different clocks to use and how to route them. This article tells you how to use routing resources efficiently.
Design-Reuse

Preservation of Circuit Structure and Timing during Fault Emulation in FPGA

This paper presents a technique that allows to preserve structure of a circuit according to a target technology during fault emulation in FPGA. The technique is not restricted to any target technology ...