Design-Reuse

LSI Logic DDR interface core delivers up to 400Mb/s for high-speed DDR SDRAM applications

Pre-designed interface core now available to simplify ASIC interfaces to DDR SDRAM Ideal for storage, computing, printer, and communications applications MILPITAS, Calif., October 8, 2002 – LSI ...
Design-Reuse

Virage Logic Extends Comprehensive DDR Interface IP Portfolio with System-Validated DDR3 and New Low Power DDR2

Intelli(TM) Line Features a Broad Range of Digital DDR Solutions Addressing the Low Power Needs of Mobile/Portable as well as High Performance Applications FREMONT, Calif., Feb 02, 2009 -- Virage ...
EDN

Virage Logic pushes into DDR3 territory with full interface IP

As DDR3 moves closer to widespread deployment, the JEDEC standard is creating a problem for SoC designers—yet another extremely challenging high-speed serial interface to implement. Not only is DDR3 a ...
9to5Mac

Logic Pros (101): Getting started with Logic Pro X – The interface

The way Logic Pro X communicates with the physical elements of your studio is very important. You might be able to get started with USB accessories like speakers and instruments that you can already ...
Hexus

PISMO Advisory Council Launched to Define External Memory Interface Standard

Spansion, ARM, NanoAmp, SMedia, Spreadtrum and Toshiba Form Organization to Streamline Memory Validation and Test SUNNYVALE, CA. – February 7, 2005 – A group of leading semiconductor companies today ...
Total Telecom

Logic-X launches the LXD30K0 best-in-class low latency, high speed, wide bandwidth analog interface FMC module

Logic-X, a rapidly emerging provider of off-the-shelf Adaptable Compute Acceleration Platforms (ACAP) and sensor processing modules, has launched the LXD30K0 low latency, wide bandwidth analog ...
EDN

Xilinx Virtex-6 FPGA User Guide Lite

Editor's Note As with similar “lite” user guides published by Programmable Logic DesignLine previously, this guide is intended to bridge the gap between a datasheet and a full, 1,000+ page user guide.